S1D13742 Epson, S1D13742 Datasheet - Page 45

• Manufacturer Part Number: S1D13742
• Description: Mobile Graphics Engine
• Manufacturer: Epson

Epson Research and Development
Vancouver Design Center
9.2 Register Set
Hardware Functional Specification
Issue Date: 2007/09/18
REG[00h] Revision Code Register
REG[04h] PLL M-Divider Register
REG[08h] PLL Setting Register 1
REG[0Ch] PLL Setting Register 3
REG[10h]
REG[14h] Panel Type Register
REG[18h] Horizontal Non-Display Period Register (HNDP)
REG[1Ch] Vertical Display Height Register 1 (VDISP)
REG[20h] HS Pulse Width Register (HSW)
REG[24h] VS Pulse Width Register (VSW)
REG[28h] PCLK Polarity Register
REG[2Ah] Input Mode Register
REG[2Eh] YUV/RGB Translate Mode Register 1
REG[32h] V Data Fix Register
REG[34h] Display Mode Register
REG[38h] Window X Start Position Register 0
REG[3Ch] Window Y Start Position Register 0
REG[40h] Window X End Position Register 0
REG[44h] Window Y End Position Register 0
REG[48h] Memory Data Port Register 0
REG[4Ah] Memory Read Address Register 0
REG[4Eh] Memory Read Address Register 2
REG[50h] Gamma Correction Enable Register
REG[54h] Gamma Correction Table Data Register
REG[56h] Power Save Register
REG[5Ah] General Purpose IO Pins Configuration Register 0
REG[5Eh] GPIO Positive Edge Interrupt Trigger Register
REG[62h] GPIO Interrupt Status Register
Register
The S1D13742 registers are listed in the following table.
Table 9-1: S1D13742 Register Set
Read-Only Configuration Registers
General Purpose IO Pins Registers
Revision 6.01 - EPSON CONFIDENTIAL
Clock Configuration Registers
Panel Configuration Registers
Gamma Correction Registers
Miscellaneous Registers
Display Mode Registers
Input Mode Register
Window Settings
Memory Access
Pg
48
52
53
60
64
46
47
48
49
52
53
54
54
55
57
59
64
65
65
66
67
67
68
69
70
72
72
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REG[02h] Configuration Readback Register
REG[06h] PLL Setting Register 0
REG[0Ah] PLL Setting Register 2
REG[0Eh] PLL Setting Register 4
REG[12h] Clock Source Select Register
REG[16h] Horizontal Display Width Register (HDISP)
REG[1Ah] Vertical Display Height Register 0 (VDISP)
REG[1Eh] Vertical Non-Display Period Register (VNDP)
REG[22h] HS Pulse Start Position Register 0 (HPS)
REG[26h] VS Pulse Start Position Register 0 (VPS)
REG[2Ch] Input YUV/RGB Translate Mode Register 0
REG[30h] U Data Fix Register
REG[36h] Special Effects Register
REG[3Ah] Window X Start Position Register 1
REG[3Eh] Window Y Start Position Register 1
REG[42h] Window X End Position Register 1
REG[46h] Window Y End Position Register 1
REG[49h] Memory Data Port Register 1
REG[4Ch] Memory Read Address Register 1
REG[52h] Gamma Correction Table Index Register
REG[58h] Non-Display Period Control / Status Register
REG[5Ch] General Purpose IO Pins Status/Control Register 0
REG[60h] GPIO Negative Edge Interrupt Trigger Register
REG[64h] GPIO Pull Down Control Register 0
Register
X63A-A-001-06
S1D13742
Page 45
Pg
46
48
48
49
50
52
53
53
54
54
57
59
61
64
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Datasheet pdf - http://www.DataSheet4U.net/