S1D13742 Epson, S1D13742 Datasheet - Page 52

• Manufacturer Part Number: S1D13742
• Description: Mobile Graphics Engine
• Manufacturer: Epson

Page 52
9.3.3 Panel Configuration Registers
bit 7
bit 0
bits 6-0
bits 6-0
S1D13742
X63A-A-001-06
REG[14h] Panel Type Register
Default = 00h
REG[16h] Horizontal Display Width Register (HDISP)
Default = 01h
REG[18h] Horizontal Non-Display Period Register (HNDP)
Default = 00h
VD Data Swap
n/a
n/a
7
7
7
6
6
6
Note
Note
Note
VD Data Swap
When this bit = 0, data lines are normal (i.e.: output pin VD35 = VD35, etc.)
When this bit = 1, data lines are swapped (i.e.: output pin VD35 = VD0, etc.)
Panel Data Width
When this bit = 0, the LCD interface is configured as 18-bit.
When this bit = 1, the LCD interface is configured as 36-bit.
Horizontal Display Width bits [6:0]
These bits specify the LCD panel Horizontal Display Width (HDISP), in 8 pixel resolu-
tion.
Horizontal Display Width in number of pixels = ((REG[16h] bits 6-0) × 8
Horizontal Non-Display Period bits [6:0]
These bits specify the horizontal non-display period in pixels. For 36-bit wide panels,
there are 2 pixels per external PCLK.
HNDP is calculated using the following formula.
The Data swap will always go from the msb to the lsb on the active output pins. See
“LCD Interface Data Pins” on page 21.
Minimum value of 8 pixels (register programmed to 1).
The minimum Horizontal Non-Display Period is 3 Pixels (REG[18h] bits 6-0 = 03h).
HS Start + HS Width <= HNDP
HNDP = (REG[18h] bits 6-0)
5
5
5
Revision 6.01 - EPSON CONFIDENTIAL
4
4
4
Horizontal Non-Display Period bits 6-0
Horizontal Display Period bits 6-0
n/a
w
w
3
3
3
w
.
D
a
t
a
2
2
2
S
h
e
Epson Research and Development
e
Hardware Functional Specification
t
.
c
1
1
1
Vancouver Design Center
o
Issue Date: 2007/09/18
.
k
r
Read/Write
Read/Write
Read/Write
Panel Data Width
0
0
0
D
a
t
a