P60ARM-B Zarlink Semiconductor, Inc., P60ARM-B Datasheet - Page 104
P60ARM-B
Manufacturer Part Number
P60ARM-B
Description
32-bit RISC microprocessor
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.P60ARM-B.pdf
(121 pages)
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P60ARM-B
Key:
100
No.
100
101
102
103
104
105
106
107
108
109
110
98
99
Cell Name
IN
OUT
NEN1
OUTENO
*
a22
a21
a20
a19
a18
a17
a16
a15
a14
a13
a12
a11
a10
A[22]
A[21]
A[20]
A[19]
A[18]
A[17]
A[16]
A[15]
A[14]
A[13]
A[12]
A[11]
A[10]
Pin
Input pad
Output pad
Input enable active high
Output enable active low
Guard Value for INTEST and EXTEST/CLAMP
Type
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Output enable
Table 25: Boundary Scan Signals & Pins
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
BS Cell
IN
0
0
0
0
0
0
0
0
0
0
0
0
0
Guard
Value
EX *
*
*
*
*
*
*
*
*
*
*
*
*
*
No.
111
112
113
114
115
116
117
118
119
120
121
Cell Name
a09
a08
a07
a06
a05
a04
a03
a02
a01
a00
abe
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
ABE
Pin
INEN1
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Type
Output enable
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
ABE=1
BS Cell
-
IN
0
0
0
0
0
0
0
0
0
0
0
Guard
Value
EX *
to tdo
*
*
*
*
*
*
*
*
*
*
*
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