FM1608-120 Ramtron Corporation, FM1608-120 Datasheet
FM1608-120
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FM1608-120 Summary of contents
Page 1
... NC A12 A7 functional DQ0 DQ1 DQ2 VSS Ordering Information FM1608-120-P FM1608-120-S 1850 Ramtron Drive, Colorado Springs, CO 80921 (800) 545-FRAM, (719) 481-7000, Fax (719) 481-7058 VDD A11 OE A10 CE DQ7 DQ6 DQ5 DQ4 DQ3 120 ns access, 28-pin plastic DIP ...
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... Address changes that occur after /CE goes low will be ignored until the next falling edge occurs. Output Enable. When /OE is low the FM1608 drives the data bus when valid data is available. Taking /OE high causes the DQ pins to be tri- stated. ...
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... When /OE is inactive the data bus will remain tri-stated. Write Operation Writes occur in the FM1608 in the same time interval as reads. The FM1608 supports both /CE and /WE controlled write cycles. In all cases, the address is latched on the falling edge of /CE. ...
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... To balance the endurance cycles and allow the user the maximum 28 July 2000 flexibility, the FM1608 employs a unique memory organization as described below. The memory array is divided into 8 blocks, each 1Kx8. The 3-upper address lines decode the block selection as shown in Figure 2 ...
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... Ramtron Figure 3. Row and Column Organization Applications As the first truly nonvolatile RAM, the FM1608 fits into many diverse applications. Clearly, its monolithic nature and high performance make it superior to battery-backed SRAM in most every application. This applications guide is intended to facilitate the transition from BBSRAM to FRAM divided into two parts ...
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... An example of the target signal relationships is shown in Figure 4. Also shown is a common SRAM signal relationship that will not work for the FM1608. Figure 4. Memory Address Relationships 28 July 2000 The main design issue is to create a decoder scheme that will drive /CE active, then inactive for each address ...
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... VDD = 5.5V, /CE at VIH, All inputs at CMOS levels, all outputs unloaded. 5. VIN, VOUT between VDD and VSS. 6. IOL = 4 IOH = -2 July 2000 Ratings - -1.0V to +7.0V 300 C Min Typ Max 4.5 5.0 5 400 -1.0 0.8 2.0 VDD + 1.0 0.4 2.4V FM1608 Units Notes 1,6 V 1,7 7/12 ...
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... Min Max Units 120 10,000 ns 120 ns 180 Min Units Notes Max Units Notes FM1608 Notes 1 1 Notes 8/12 ...
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... Ramtron AC Test Conditions Input Pulse Levels Input rise and fall times Input and output timing levels Read Cycle Timing Write Cycle Timing - /CE Controlled Timing 28 July 2000 Equivalent AC Load Circuit 1.5V FM1608 9/12 ...
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... Write Cycle Timing - /WE Controlled Timing Power Cycle Timing Data Retention VDD = 4.5V to 5.5V unless otherwise specified Parameter Min Data Retention 10 Notes 1. Data retention is specified The relationship between retention, temperature, and the associated reliability level is characterized separately. 28 July 2000 Units Notes Years 1 FM1608 10/12 ...
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... in. 28 July 2000 Min Nom. Max 2.35 2.65 0.0926 0.1043 0.10 0.30 0.004 0.0118 0.33 0.51 0.013 0.020 0.23 0.32 0.0091 0.0125 17.70 18.10 0.6969 0.7125 7.40 7.60 0.2914 0.2992 1.27 BSC 0.050 BSC 10.00 10.65 0.394 0.419 0.25 0.75 0.010 0.029 .40 1.27 0.016 0.050 0 8 FM1608 . .004 in. 11/12 ...
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... L in July 2000 D B1 Min Nom. Max 0.250 6.35 0.015 0.39 0.125 0.195 3.18 4.95 0.014 0.022 0.356 0.558 0.030 0.070 0.77 1.77 1.380 1.565 35.1 39.7 0.005 0.13 0.600 0.625 15.24 15.87 0.485 0.580 12.32 14.73 0.100 BSC 2.54 BSC 0.600 BSC 15.24 BSC 0.700 17.78 0.115 0.200 2.93 5.08 FM1608 12/12 ...