AN2168 Freescale Semiconductor / Motorola, AN2168 Datasheet - Page 14

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AN2168

Manufacturer Part Number
AN2168
Description
ColdFire Microprocessor DMA Controller Application Note
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
Auto-alignment
14
DSR = 0x01 ; clear status register
SAR = 0xFFE00001 ; source address = 0xFFE00001
DAR = 0x20000000 ; destination address = 0x20000000
BCR = 0x0004 ; transfer 4 bytes
DCR = 0x006B ; no auto-align, source=16-bit, destination=8-bit
DSR = 0x01 ; clear status register
SAR = 0xFFE00001 ; source address = 0xFFE00001
DAR = 0x20000000 ; destination address = 0x20000000
BCR = 0x0004 ; transfer 4 bytes
DCR = 0x106B ; auto-align, source=16-bit, destination=8-bit
The DMA has an auto-alignment feature which allows transfers to or
from misaligned addresses. The auto-alignment logic will break
transfers up depending on the address, byte count, and transfer size.
For example, using the same chip select settings as
Mode Example 1
a configuration error.
Since the source size is word, the source address must be word-aligned
if the auto-align feature is not being used. However, if the auto-align
feature is enabled, the ColdFire can complete the DMA transfer even if
either the source or destination is not aligned.
Here are the settings for the same transfer, but this time with auto-
alignment enabled:
Figure 8
shows the actual transfer.
and the DMA registers settings that follow would give
Dual Address
MOTOROLA
AN2168

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