AN2168 Freescale Semiconductor / Motorola, AN2168 Datasheet - Page 4

Manufacturer Part Number

AN2168

Description

ColdFire Microprocessor DMA Controller Application Note

Manufacturer

Freescale Semiconductor / Motorola

Datasheet

1.AN2168.pdf (28 pages)

Application Note

Figure 2

shows another word-sized bus cycle to 0xFFE00400. The chip

select settings are the same, but this time it is a DMA-initiated bus cycle.

Figure 2. DMA-Initiated Bus Cycle

When comparing the two bus cycles, the basic timing properties are the

same. Both bus cycles take six clocks (three wait states) to complete. In

Figure 1

there are two dead clocks after the deassertion of the chip

select and before TS asserts for the start of the next bus cycle. The DMA

will result in back-to-back bus cycles, so in

Figure 2

there are no dead

clocks between bus cycles. By eliminating dead clocks and allowing the

core to run code from internal memory, the DMA can be used to transfer

large blocks of data more efficiently than the core itself.

AN2168

MOTOROLA