AN2168 Freescale Semiconductor / Motorola, AN2168 Datasheet - Page 16

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AN2168

Manufacturer Part Number
AN2168
Description
ColdFire Microprocessor DMA Controller Application Note
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
DMA and UARTs
16
NOTE:
NOTE:
The MCF5307 and MCF5407 both have four DMA channels. For
channels 0 and 1, the external request signals are connected to the
external request pins DREQ[1:0]. The external requests for the
remaining channels are internally tied to the UART interrupt request
lines so that channel 2 corresponds to UART0 and channel 3
corresponds to UART1. This allows a UART (universal asynchronous
receiver transmitter) receive interrupt condition to automatically trigger a
DMA transfer.
To generate a request to the DMA, the UART should be programmed so
that the receive interrupt is enabled in the UART interrupt mask register
(UIMR). The receive interrupt condition should be set to the RxRDY
option in the UART mode register (UMR1). Now the UART will assert its
interrupt request line whenever a character is received.
The interrupt must remain masked in the interrupt mask register (IMR).
This allows the DMA to respond to the UART interrupt request instead
of the core.
The DMA channel should be programmed for dual address, cycle steal
mode operation. The external request bit should be set so the DMA can
recognize the UART interrupt line as a DMA request. The source
address is set to the location of the UART receive buffer (URB) and the
source increment option is disabled.
Refer to
The MCF5206e cannot DMA to or from the UARTs. The MCF5307 and
MCF5407 can DMA from the UARTs, but not to the UARTs.
DMA from UART Example
for assembly example code.
MOTOROLA
AN2168

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