AN2797 Freescale Semiconductor / Motorola, AN2797 Datasheet - Page 14

• Manufacturer Part Number: AN2797
• Description: Migrating from IBM 750GX to MPC7447A
• Manufacturer: Freescale Semiconductor / Motorola

Programming Model
The MPX bus mode’s support for data intervention and full data streaming for burst reads and writes is realized
through the addition of two new signals—HIT and DRDY.
The HIT signal is a point-to-point signal output from the processor or local bus slave to the system arbiter. This
signal indicates a valid snoop response in the address retry (ARTRY) window (the cycle after an address
acknowledge (AACK) that indicates that the MPC7447A will supply intervention data). Intervention occurs when
the MPC7447A has the data that has been requested by another master’s bus transaction in its L1 or L2. Instead of
asserting ARTRY and flushing the data to memory, the MPC7447A may assert HIT to indicate that it can supply the
data directly to the other master. This external intervention functionality is disabled by MSSCR0[EIDIS]. The
DRDY signal is also used by the MPX bus protocol to implement data intervention in the case of a cache hit. The
SHD1 signal operates in conjunction with the SHD0 signal to indicate that a cached item is shared.
MPX mode offers one final improvement to the 60x with support for out of order transactions. As mentioned
previously the MPC7447A supports up to 16 outstanding transactions compared to the 5 supported by the 750GX.
This means that the MPC7447A has increased efficiency with its deeper pipeline of transactions. A further
improvement specific to MPX mode is that these transactions can be out of order, allowing lower latency devices to
return data as soon as they are ready, without waiting for higher latency devices to return data first just because their
transaction was first.
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Programming Model
Both the IBM 750GX and MPC7447A have to support the PowerPC standard architecture in order to retain
compatibility in user mode where only recompilation will allow IBM 750GX user code to execute properly on the
MPC7447A. However in supervisor mode there are many differences between device dependent registers even
though some of the names are the same, the fields are often changed in name and/or bit position. There are also
additional registers in different PowerPC implementations to support additional features. This section maps the
supervisor level registers between IBM 750GX and MPC7447A and points out any additional or device specific
features.
The diagrams below show the IBM 750GX and MPC7447A programming model respectively.
Migrating from IBM 750GX to MPC7447A, Rev. 1.0
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