AN2797 Freescale Semiconductor / Motorola, AN2797 Datasheet - Page 26

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AN2797

Manufacturer Part Number
AN2797
Description
Migrating from IBM 750GX to MPC7447A
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Hardware Considerations
1. As in Table 7 – PLL range configuration
5.1.2 MPC7447A Uncommon Pins
Table 14
26
Signal Name
AVdd
BMODE0
BMODE1
DRDY
DTI[0:3]
EXT_QUAL
GBL
GND_SENSE
HIT
Ovdd
PMON_IN
PMON_OUT
SHD[0:1]
TEMP_ANODE
TEMP_CATHODE
Signal Name
GBL
PLL_RNG
RSRV
TLBISYNC
shows the signal name, pin number and a description of the signal.
Pin Number
W15, U14
Number
G1, K1,
P1, N1
E4, H5
G12,
E18,
N13
G18
N18
N19
W11
A11
Pin
W1
G9
R3
D9
A8
F8
E2
B2
A9
Y4
Migrating from IBM 750GX to MPC7447A, Rev. 1.0
Table 14. IBM 750GX Additional Signals
Table 13. IBM 750GX additional signals
Active
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Active
High
Low
Low
Low
I/O
I/O
I/O
O
O
O
I
I
I
I
I
Description
PLL supply voltage
Bus mode select 0
Bus mode select 1
Data ready output signal to system arbiter
Data transfer index (for outstanding bus transactions)
Extension qualifier
Global signal to shared memory for snooping/coherency
purposes
Internally connected to GND allowing an external device to
know core ground level.
MPX support for cache to cache transfers and local bus
slaves.
Supply voltage connection for system interface
Transitions counted by PMC1, event 7
Asserted when any performance monitor threshold or
condition occurs regardless of whether exceptions are
enabled or not
Assertion indicates processor contains data from the
snooped address. Second SHD signal required for MPX bus
mode.
Anode from internal temperature diode
Cathode from internal temperature diode
I/O
I/O
O
I
I
Description
Global signal is required for IBM 750GX snooping
Specifies PLL range
Internal reservation coherency bit
TLB invalidate synchronize
1
Freescale Semiconductor

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