RTL8181 ETC, RTL8181 Datasheet - Page 29

• Manufacturer Part Number: RTL8181
• Description: Wireless LAN Access Point/Gateway Controller
• Manufacturer: ETC

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0
0
4
4
4
8
Rx Status Descriptor (OWN=0)
O
W
N
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0
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0
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CONFIDENTIAL
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
E
O
R
F
S
L
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29-13 -
12-0 Buffer_Size
31-17 RSEV
16
15-0 VLAN_TAG
31-0 RxBuff
Bit# Bit Name Description
31
30
29
28
27
26
25
24
F
A
E
M
A
R
TAVA
OWN
EOR
FS
LS
FAE
MAR
PAM
BAR
P
A
M
RESV
B
A
R
B
O
V
F
When set, indicates that the descriptor is owned by NIC. When
cleared, indicates that the descriptor is owned by host system. NIC
clears this bit when NIC has filled up this Rx buffer with a packet or
part of a packet. In this case, OWN=0.
End of Rx descriptor Ring. Set to 1 indicates that this descriptor is the
last descriptor of Rx descriptor ring. Once NIC’s internal receive
descriptor pointer reaches here, it will return to the first descriptor of
Rx descriptor ring after this descriptor is used by packet reception.
First segment descriptor. When set, indicates that this is the first
descriptor of a received packet, and this descriptor is pointing to the
first segment of the packet.
Last segment descriptor. When set, indicates that this is the last
descriptor of a received packet, and this descriptor is pointing to the
last segment of the packet.
Frame Alignment Error. When set, indicates a frame alignment error
has occurred on the received packet. The FAE packet is able to be
received only when RCR_AER is set.
Multicast Address packet Received: When set, indicates that a
multicast packet is received
Physical Address Matched. When set, indicates that the destination
address of this Rx packet matches to the value in NIC ’s ID registers.
Broadcast Address Received. When set, indicates that a broadcast
packet is received. BAR and MAR will not be set simultaneously.
F
O
V
F
R
W
T
Reserved.
This field indicate the receive r buffer size in bytes. Although the
maximum buffer size is 8K bytes/buffer, the NIC purges all data
after 4K bytes if the packet is larger than 4K-byte long.
Reserved.
Tag Available. When set, the received packet is an IEEE802.1Q
VLAN TAG (0x8100) available packet.
If the packet ‘s TAG is 0x8100, The
NIC extracts four bytes from after source ID, sets TAVA bit to1,
and moves the TAG value to this field in Rx descr iptor.
Logic Address of receive buffer.
R
E
S
R
U
N
T
RX_BUFFER_ADDRESS
C
R
C
P
I
D
1
P
I
D
0
T
A
V
A
Dummy
IP
F
U
D
P
F
T
C
P
F
29
VLAN_TAG
8
Frame_Length
7
6
5
4
3
2
1
0
Offset 0
Offset 4
Offset 8
Offset 12
RTL8181
v1.0