adsp-21msp58 Analog Devices, Inc., adsp-21msp58 Datasheet - Page 17

• Manufacturer Part Number: adsp-21msp58
• Description: Dsp Microcomputers
• Manufacturer: Analog Devices, Inc.

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INSTRUCTION SET DESCRIPTION
The ADSP-21msp58/59 assembly language instruction set has
an algebraic syntax that was designed for ease of coding and
readability. The assembly language, which takes full advantage
of the processor’s unique architecture, offers the following
benefits:
• The algebraic syntax eliminates the need to remember cryptic
• Every instruction assembles into a single 24-bit word and
•The syntax is a superset of the ADSP-2100 Family assembly
• Sixteen condition codes are available. For conditional jump,
• Multifunction instructions allow parallel execution of an
Consult the ADSP-2100 Family User’s Manual for a complete
description of the syntax and an instruction set reference.
assembler mnemonics. For example, a typical arithmetic add
instruction, such as AR = AX0 + AY0, resembles a simple
equation.
executes in a single cycle.
language and is completely source and object code compatible
with other family members. Programs may, however, need to
be relocated to utilize internal memory and conform to the
ADSP-21msp58/59 interrupt vector and reset vector map.
call, return, or arithmetic instructions, the condition can be
checked and the operation executed in the same instruction
cycle.
arithmetic instruction with up to two fetches and one write to
processor memory space during a single instruction cycle.
ADSP-21msp58/59 HDR5 Write
ADSP-21msp58/59 HDR4 Write
ADSP-21msp58/59 HDR3 Write
ADSP-21msp58/59 HDR2 Write
ADSP-21msp58/59 HDR1 Write
ADSP-21msp58/59 HDR0 Write
15
15
0
0
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
Control Registers
0
0
9
9
0x3FE6
0x3FE7
HSR6
HSR7
0
0
8
8
–17–
0
1
7
7
ADSP-21msp58/59 EXTENDED INSTRUCTION SET
The ADSP-21msp58/59 has a number of additional instruc-
tions beyond the standard ADSP-2100 Family instruction set.
These additional instructions and mathematical operations are
described below.
Slow IDLE
Slow IDLE allows slowing the processor’s internal clock by a
factor of 16, 32, 64, or 128 during IDLE. The instruction
source code is specified as follows:
Syntax:
Permissible Values for n
16, 32, 64, 128
Examples:
Description: The IDLE instruction causes the processor to
Interrupt Enable and Disable Instructions
The ADSP-21msp58/59 supports an interrupt enable instruc-
tion and interrupt disable instruction. Interrupts are enabled by
default at reset. The interrupt enable instruction source code is
specified as follows:
0
0
6
6
0
0
5
5
0
0
4
4
IDLE (n);
0
0
3
3
IDLE;
IDLE (16);
wait indefinitely in a low power state until an in-
terrupt occurs. When an unmasked interrupt oc-
curs, it is serviced; execution then continues with
the instruction following the IDLE instruction.
The optional value provides a “slow idle” fea-
ture; slowing the clock down by the factor set
with the value.
0
0
2
2
0
0
1
1
0
0
0
0
ADSP-21msp58/59
Host HDR0 Write
Host HDR1 Write
Host HDR2 Write
Host HDR3 Write
Host HDR4 Write
Host HDR5 Write
ADSP-21msp58/59 HDR0 Write
ADSP-21msp58/59 HDR1 Write
ADSP-21msp58/59 HDR2 Write
ADSP-21msp58/59 HDR3 Write
ADSP-21msp58/59 HDR4 Write
ADSP-21msp58/59 HDR5 Write
Overwrite Mode
Software Reset