z86e72 ZiLOG Semiconductor, z86e72 Datasheet - Page 51

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z86e72

Manufacturer Part Number
z86e72
Description
Otp Microcontroller
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS008704-0507
Notes:
Table 22. CTR0(D)00h Register (Continued)
T8 Enable
This field enables T8 when set (written) to 1.
Single/Modulo-N
When set to 0 (modulo-n), the counter reloads the initial value when the terminal
count is reached. When set to 1 (single pass), the counter stops when the terminal
count is reached.
Time-Out
This bit is set when T8 times out (terminal count reached). To reset this bit, a 1
must be written to this location.
T8 Clock
This bit defines the frequency of the input signal to T8.
Capture_INT_Mask
Set this bit to allow interrupt when data is captured into either LO8 or HI8 upon a
positive or negative edge detection in demodulation mode.
Field
Counter_INT_Mask
P34_Out
Note: *Indicates the value upon Power-On Reset
This is the only way to reset this status condition; therefore,
you must reset this bit before using/enabling the counter/
timers.
Care must be taken when using the OR or AND commands to
manipulate CTR0, bit 5 and CTR1, bits 0 and 1 (demodulation
mode). These instructions use a Read-Modify-Write sequence
in which the current status from the CTR0 and CTR1 registers
is ORed or ANDed with the designated value and then written
back into the registers. For example, when the status of bit 5 is
1, a reset condition occurs.
Bit Position
------1-
-------0
R/W
R/W
0
1
0*
1
Value
Description
Disable Time-Out Int.
Enable Time-Out Int.
P34 as Port Output
T8 Output on P34
OTP Microcontroller
47

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