z86e72 ZiLOG Semiconductor, z86e72 Datasheet - Page 66
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z86e72
Manufacturer Part Number
z86e72
Description
Otp Microcontroller
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z86E72.pdf
(102 pages)
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PS008704-0507
T16_OUT
CTR1, D2
Interrupts
Starting Ping-Pong Mode
First, make sure both counter/timers are not running. Then set T8 into Single-
Pass Mode (CTR0 D6), set T16 into Single-Pass Mode (CTR2 D6), and set Ping-
Pong Mode (CTR1 D2, D3). These instructions do not have to be in any particular
order. Finally, start Ping-Pong Mode by enabling either T8 (CTR0 D7) or T16
(CTR2 D7).
During Ping-Pong Mode
The enable bits of T8 and T16 (CTR0 D7, CTR2 D7) are alternately set and
cleared by hardware. The time-out bits (CTR0 D5, CTR2 D5) are set every time
the counter/timers reach the terminal count.
Output Circuit
Figure 36
The Z86E7X has five different interrupts. The interrupts are maskable and priori-
tized, as shown in
sources are claimed by Port 3 lines P33–P31 and the remaining two by the
counter/timers (see
enables or disables the five interrupt requests.
CTR1 D3
T8_OUT
MUX
shows the output circuit.
Figure
Table
Figure 36. Output Circuit
AND/OR/NOR/NAND
37. The five sources are divided as follows: three
26). The Interrupt Mask Register globally or individually
CTR1 D5,D4
Logic
P34_INTERNAL
P35_INTERNAL
P36_INTERNAL
CTR0 D0
CTR1 D6
CTR2 D0
OTP Microcontroller
MUX
MUX
MUX
P34_EXT
P35_EXT
P36_EXT
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