mpc8568e Freescale Semiconductor, Inc, mpc8568e Datasheet - Page 87

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mpc8568e

Manufacturer Part Number
mpc8568e
Description
Mpc8568e Powerquicc Iii Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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15.9
Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause
47 of IEEE 802.3ae-2002, the measurement and test requirements defined here are similarly guided by
Clause 47. In addition, the CJPAT test pattern defined in Annex 48A of IEEE 802.3ae-2002 is specified as
the test pattern for use in eye pattern and jitter measurements. Annex 48B of IEEE 802.3ae-2002 is
recommended as a reference for additional information on jitter test methods.
15.9.1
For the purpose of eye template measurements, the effects of a single-pole high pass filter with a 3 dB point
at (Baud Frequency)/1667 is applied to the jitter. The data pattern for template measurements is the
Freescale Semiconductor
-V
-V
Measurement and Test Requirements
V
V
MPC8568E/MPC8567E PowerQUICC III™ Integrated Processor Hardware Specifications, Rev. 0
Table 64. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter
DIFF
DIFF
DIFF
DIFF
Eye Template Measurements
1.25 GBaud
2.5 GBaud
3.125 GBaud
min
max
max
min
0
Receiver Type
0
Figure 55. Receiver Input Compliance Mask
V
DIFF
A
min (mV)
100
100
100
B
Time (UI)
V
DIFF
max (mV)
800
800
800
1-B
A (UI)
0.275
0.275
0.275
1-A
B (UI)
0.400
0.400
0.400
Serial RapidIO
1
87

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