ucb1500 NXP Semiconductors, ucb1500 Datasheet - Page 24

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ucb1500

Manufacturer Part Number
ucb1500
Description
Pci To Ac97 Bridge/host Controller
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
ucb1500BE
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Product specification
8.1.10 [001a]: Receive DMA #0 FIFO count register.
8.1.11 [001b]: Receive DMA #0 command register
8.1.12 [001c-001d]: Transmit DMA #0 descriptor table pointer (DTP)
8.1.13 [001e]: Transmit DMA #0 FIFO counter register
8.1.14 [001f]: Transmit DMA #0 command register
8.1.15 [0020 - 002F] Reserved
8.1.16 [0030]: Receive DMA #1 Byte Counter
8.1.9 [0018-0019] Receive DMA #0 descriptor table pointer (DTP)
Table 29: Transmit DMA #1 Command Register bit description
Similar to Receive DMA #1 command register.
Similar to Transmit DMA #1 command register
Table 30: Receive DMA #1 Byte Counter register bit description
Bit
4(w)
4(r)
3
2(w)
1
0
Bit
15-0
Description
Immediate Transmit Abort
Set this bit to immediately abort the current block transmission. The FIFO will
also be flushed. A partial initialization will be required to resume the
transmission. After setting this bit to 1, set bit 5 of this register, then clear this bit.
See abort procedures for more details.
Abort status
PCI aborted, or Software aborted, or DMA underrun = 1.
Normal Transmit Abort
Set this bit to abort the current block transmission after the current data buffer
has been completely transmitted. The FIFO will also be flushed. A partial
initialization will be required to resume the transmission. After setting this bit to 1,
set bit 5 of this register, then clear this bit. See abort procedures for more details
Start transmit-DMA #1
Set this bit to initiate DMA#1 transmit mode after the transmit descriptor tables
are ready.
HOLD status/acknowledge
If this bit is set upon a read access, the UCB1500 is currently in the hold
condition, as a result of reading an invalid descriptor entry, and is waiting for an
acknowledgment before proceeding. Writing a ‘1’ to this bit will send a hold
acknowledge to the UCB1500.
Reserved.
Description
Receive DMA #1 Byte Counter
Number of valid bytes in the data buffer pointed to by receive DMA #1 current
descriptor entry. This counter counts up from 0 and contains the number of bytes
received and transferred to memory.
Rev. 03 — 7 July 2000
PCI to AC97 bridge/host controller
© Philips Electronics N.V. 2000. All rights reserved.
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UCB1500
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