ucb1500 NXP Semiconductors, ucb1500 Datasheet - Page 43

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ucb1500

Manufacturer Part Number
ucb1500
Description
Pci To Ac97 Bridge/host Controller
Manufacturer
NXP Semiconductors
Datasheet

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9. DMA engine application notes
Philips Semiconductors
9397 750 07443
Product specification
All DMA transfers use Descriptor Tables (DT). The DT must be contiguous in the Host
memory, and each DMA channel must have its won DT set up as one buffer. For
transmission, each DT must have not empty DT entries, and the last entry of a DT
must point to valid data, or to a linked descriptor table. Each DT entry is 8 bytes in
size. It contains the base address, byte count and command/status bits as illustrated
in
Each DMA channel has a DTP (Descriptor Table Pointer), which points to entries in
the descriptor tables. When the last entry in the descriptor table is reached, and the
corresponding buffer is completely utilized, the DMA controller can jump to a new
descriptor table, if necessary, as specified by the link bit of the last entry. The entire
process is repeated for the remainder of the transfer session.
Note:
1. DT must be quad-word aligned. There are no restrictions to the size of the DT.
2. The data buffer area pointed by each DT entry must not exceed 64K 1 in size.
Fig 4. Descriptor Table entry format
Figure
No empty DT entries are allowed. The DT has to be in the continuous physical
memory space up to 4 GigaBytes.
The data address must be double-word aligned as the UCB1500 fetches 4 bytes
at a time.
31
0
Data area BASEADDR in physical memory
CMD/STT
4.
Rev. 03 — 7 July 2000
23
COUNT
PCI to AC97 bridge/host controller
© Philips Electronics N.V. 2000. All rights reserved.
UCB1500
15
SC00209
BYTE
0
4
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