ucb1500 NXP Semiconductors, ucb1500 Datasheet - Page 26

• Manufacturer Part Number: ucb1500
• Description: Pci To Ac97 Bridge/host Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 07443
Product specification
8.1.28 [0054]: Miscellaneous
8.1.29 [0055-56]: Reserved
8.1.30 [0057]: Miscellaneous
Table 34: Miscellaneous register bit description
Table 35: Miscellaneous register bit description
Bit
15-14
13
12
11-10
9
8-0
Bit
15-9
8
7
6
5(r)
4(r)
3-0
Description
Reserved.
PCI read retry complete
If set, UCB1500 will always complete any read cycle that is being retried by the
PCI target even if DMA is aborted. The data returned is then discarded.
Recommended setting is 1.
Reserved.
PCI bus outstanding cycle limit
Other values are reserved.
Software reset
While set, internal state machine and IO registers revert to power-up state (see
software rest section).
Reserved.
Description
Reserved.
Control register access
Control how I/O space can be accessed in different power states. Note that this
bit applies to each function separately.
Function 1 Enable
If set to ‘1’, function 1 configuration space will be enabled, otherwise, EEPROM
will determine if it is enabled or not.
Reserved. Must be set to 1.
Function 1 status
If ‘1’, function 1 is enabled during reset.
EEPROM autoload
If ‘1’, EEPROM autoload is enabled during reset.
Reserved.
•
•
00 = allow 1 outstanding PCI master read cycle and 1 master write cycle.
01 = allow 2 outstanding PCI master read cycles and 1 master write cycle.
Other read cycles are allowed to proceed ahead of write cycles.
If set to ‘1’, then for each of function, I/O register access is allowed if the
function is programmed to D0, D1 or D2 power state. If the function is
programmed to D3 power state, all I/O register access will be ignored, even if
its I/O space access bit is enabled in the PCI command register.
If set to ‘0’ (default), then for each function, I/O register access is allowed if
the function is programmed to D0 power state. If the function is programmed
to D1, D2 or D3 power state, all I/O register access will be ignored.
Rev. 03 — 7 July 2000
PCI to AC97 bridge/host controller
© Philips Electronics N.V. 2000. All rights reserved.
UCB1500
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