peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 112

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peb20534h-52

Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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6) The master deactivates its LBREQ signal again one LBI clock after deactivation of
LHLDA. From now on (and not earlier), the slave can generate a new hold request from
the master. With this procedure it is assured that the master can perform at least one
complete bus cycle before requested to go into hold mode again by the slave.
Also shown in the figure below is the sequence of the bus control between the master
and the slave.
Figure 32
Data Sheet
M-LHOLD
S-LBREQ
M-LHLDA
S-LHLDA
M-LBREQ
S-LHOLD
LBUS
Bus Arbitration Sequence
Master on the Bus
1)
2)
3a)
112
Slave on the Bus
3b)
4)
Multi Function Port (MFP)
5)
Master on the Bus
6)
PEB 20534
ITS10618
PEF 20534
2000-05-30

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