peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 369
peb20534h-52
Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534H-52.pdf
(439 pages)
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Data Sheet
GPDIR
(15:0)
GPP I/O Signal Direction Control
Each bit of this bit field controls the direction (input/output) of the
corresponding General Purpose Pin. E.g. GPDIR bit 8 determins the I/O
characteristic of pin GP8.
Note: Even if not configured for GPP operation (bit field ’PERCFG’ in
GPDIR(i)=’0’ Pin GPi is configured as input pin.
GPDIR(i)=’1’ Pin GPi is configured as output pin.
register GMODE), this register must be programmed appropriately
for correct SSC or LBI operation.
(For detailed information refer to the chapters describing SSC and
LBI operation.)
369
Detailed Register Description
PEB 20534
PEF 20534
2000-05-30
(-)
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