peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 163

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Figure 56
7.8.2
FM0: An edge occurs at the beginning of every bit cell. A logical ‘0’ has an additional
edge in the center of the bit cell, whereas a logical ‘1’ has none. The transmit clock
precedes the receive clock by 90 .
FM1: An edge occurs at the beginning of every bit cell. A logical ‘1’ has an additional
edge in the center of the bit cell, a logical ‘0’ has none. The transmit clock precedes the
receive clock by 90 .
Figure 57
Data Sheet
Receive Clock
Transmit
Transmit
Clock
Receive
Clock
FM0
FM1
NRZ
NRZI
/
FM0 and FM1 Encoding
NRZ and NRZI Data Encoding
FM0 and FM1 Data Encoding
0
1
1
1
1
Serial Communication Controller (SCC) Cores
0
163
0
0
0
1
1
0
0
ITD01809
PEB 20534
PEF 20534
ITD05313
2000-05-30