peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 377
peb20534h-52
Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534H-52.pdf
(439 pages)
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HI:
Next
Transmit
Descriptor
Pointer:
Transmit
Data
Pointer:
C:
Data Sheet
Host Initiated Interrupt
If the HI bit is set, the corresponding DMAC generates an interrupt with set
HI bit after transferring all data bytes of the current data section.
Complete
This bit is set by the DSCC4 if
- it completes reading data section normally
- it was aborted by a transmitter reset command.
This 32-bit pointer contains the start address of the next transmit descrip-
tor. After sending the indicated number of data bytes, DSCC4 branches to
the next transmit descriptor to continue transmission. The transmit descrip-
tor is read entirely at the beginning of transmission and stored in on-chip
memory. Therefore all information in the next descriptor must be valid
when the DSCC4 branches to this descriptor.
This pointer is not used if a transmitter reset or initialization channel com-
mand is detected while the DSCC4 still reads data from the current trans-
mit descriptor. In this case BTDA value in the BTDA register is used as a
pointer for the next transmit descriptor to be branched to.
This 32-bit pointer contains the start address of the transmit data section.
Although DSCC4 works long word oriented, it is possible to begin transmit
data section at byte addresses.
377
Host Memory Organization
PEB 20534
PEF 20534
2000-05-30
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