sta381bws STMicroelectronics, sta381bws Datasheet - Page 85

• Manufacturer Part Number: sta381bws
• Description: Sound Terminal 2.1-channel High-efficiency Digital Audio System Sound Terminal 2.1-channel High-efficiency Digital Audio System
• Manufacturer: STMicroelectronics

STA381BWS
6.25
6.26
6.26.1
6.26.2
Fault-detect recovery constant registers (addr 0x3C - 0x3D)
The FDRC bits specify the 16-bit fault-detect recovery time delay. When FAULT is asserted,
the TRISTATE output is immediately asserted low and held low for the time period specified
by this constant. A constant value of 0x0001 in this register is approximately 0.083 ms. The
default value of 0x300C gives approximately 1 sec.
0x0000 is a reserved value.
Extended configuration register (addr 0x47)
Extended configuration register provides access to biquad 5, 6 and 7.
Extended post-scale range
Table 75.
Post-scale is an attenuation by default. When PS48DB is set to 1, a 48-dB offset is applied
to the coefficient RAM value, so post-scale can act as a gain too.
Extended attack rate
The attack rate shown in
on both limiters.
Table 76.
Reserved
FDRC15
FDRC7
D7
D7
D7
0
0
0
PS48DB
XAR1
0
1
0
1
Extended post-scale range
Extended attack rate, limiter 1
Reserved
FDRC14
FDRC6
D6
D6
D6
0
0
FDRC13
Table 68
PS48DB
FDRC5
Post-scale value is applied as defined in coefficient RAM
Post-scale value is applied with +48 dB offset with respect to the
coefficient RAM value
Limiter1 attack rate is configured using
Limiter1 attack rate is 8 dB/ms
D5
D5
D5
1
0
0
Doc ID 018937 Rev 2
can be extended to provide up to an 8 dB/ms attack rate
FDRC12
FDRC4
XAR1
D4
D4
D4
1
0
0
FDRC11
FDRC3
XAR2
D3
D3
D3
0
1
0
Mode
Mode
Register description: New Map
FDRC10
FDRC2
BQ5
Table 68
D2
D2
D2
0
1
1
FDRC9
FDRC1
BQ6
D1
D1
D1
0
0
1
FDRC8
FDRC0
BQ7
D0
D0
D0
0
0
1
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