tmp19a43fd TOSHIBA Semiconductor CORPORATION, tmp19a43fd Datasheet - Page 44

• Manufacturer Part Number: tmp19a43fd
• Description: 32-bit Risc Microprocessor
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.3.10
Determination of a Serial Operation Mode
communications between the controller and the target board, the controller must first send a value of
86H at a desired baud rate to the target board. To use I/O Interface mode, the controller must send a
value of 30H at 1/16 the desired baud rate. Figure 3.2 shows the waveforms for the first byte.
SIO reception disabled, and calculates the intervals of tAB, tAC and tAD. Figure 3.3 shows a flowchart
describing the steps to determine the intervals of tAB, tAC and tAD. As shown in the flowchart, the
boot program captures timer counts each time a logic transition occurs in the first serial byte.
Consequently, the calculated tAB, tAC and tAD intervals are bound to have slight errors. If the transfer
goes at a high baud rate, the CPU might not be able to keep up with the speed of logic transitions at the
serial receive pin. In particular, I/O Interface mode is more prone to this problem since its baud rate is
generally much higher than that for UART mode. To avoid such a situation, the controller should send
the first serial byte at 1/16 the desired baud rate.
Interface modes. If the length of tAB is equal to or less than the length of tCD, the serial operation
mode is determined as UART mode. If the legnth of tAB is greater than the length of tCD, the serial
operation mode is determined as I/O Interface mode. Bear in mind that if the baud rate is too high or the
timer operating frequency is too low, the timer resolution will be coarse, relative to the intervals
between logic transitions. This becomes a problem due to inherent errors caused by the way in which
timer counts are captured by software; consequently the boot program might not be able to determine
the serial operation mode correctly.
intended mode is UART mode. To avoid such a situation, when UART mode is utilized, the controller
should allow for a time-out period within which it expects to receive an echo-back (86H) from the target
board. The controller should give up the communication if it fails to get that echo-back within the
alloted time. When I/O Interface mode is utilized, once the first serial byte has been transmitted, the
controller should send the SCLK clock after a certain idle time to get an acknowledge response. If the
received acknowledge response is not 30H, the controller should give up further communications.
The first byte from the controller determines the serial operation mode. To use UART mode for
After
The flowchart in Figure 3.4 shows how the boot program distinguishes between UART and I/O
For example, the serial operation mode may be determined to be I/O Interface mode when the
UART (86H)
I/O Interface
RESET
(30H)
is released, the boot program monitors the first serial byte from the controller, with the
Figure 3.2 Serial Operation Mode Byte
Point A
Point A
TMP19A43 (rev2.0)3-30
Start
bit 0
tAB
bit 0
bit 1
Point B
tAB
bit 1
bit 2
bit 2
bit 3
Point C
Point B
bit 3
bit 4
bit 4
bit 5
Point C
tCD
bit 5
bit 6
Flash Memory Operation
tCD
TMP19A43
bit 6
bit 7
Point D
Point D
bit 7
Stop