tmp19a43fd TOSHIBA Semiconductor CORPORATION, tmp19a43fd Datasheet - Page 71

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tmp19a43fd

Manufacturer Part Number
tmp19a43fd
Description
32-bit Risc Microprocessor
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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ROMSEC1<RSECON>
write
SEQMOD<DSUOFF>
write
Write data to ROMSEC1<RSECON>
Write data to SEQMOD<DSUOFF>
4.5.4
4.5.5
The ROM protect register is equipped with a power-on reset circuit. Caution must be exercised as data
read from the ROMSEC1<RSECON> bit is different from the actually written data. How data is
processed is shown below. The mask version is usually initialized by reset though FLASH goods are
initialized by power-on reset.
The DSU protect mode register is equipped with a power-on reset circuit. Caution must be exercised as
data read from the SEQMOD <DSUOFF> bit is different from the actually written data. How data is
processed is shown below. The mask version is usually initialized by reset though FLASH goods are
initialized by power-on reset.
CLK
CLK
ROM Protect Register: ROMSEC1<RSECON>
DSU Protect Mode Register: SEQMOD <DSUOFF>
If the ROM is in a protected state, access from
areas other than the internal ROM is disabled.
If the ROM is in a protected state, access from
areas other than the internal ROM is disabled.
D
D
Reset
Reset
SD
SD
TMP19A43 (rev2.0) 4-12
Q
Q
ROMSEC2 = 0x0000_003D
DSUSEC2 = 0x0000_00C5
Power-on reset
Power-on reset
Read data from ROMSEC1<RSECON>
Read data from SEQMOD<DSUOFF>
D
D
Flash read protect function
SD
SD
Flash read protect function
Q
Q
Various protecting functions
TMP19A43
ROM protect
DSU protect

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