tc59lm836dkg TOSHIBA Semiconductor CORPORATION, tc59lm836dkg Datasheet - Page 45

• Manufacturer Part Number: tc59lm836dkg
• Description: 288mbits Network Fcram2 ? 2,097,152-words ? 4 Banks ? 36-bits
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Bank Add.
Command
Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Address
(output)
(output)
(output)
(output)
MODE REGISTER SET TIMING (CL = 4, BL = 2)
(input)
(input)
From Read operation to Mode Register Set operation.
CLK
CLK
QS
DQ
DQ
DS
DS
QS
RDA
Note: Minimum delay from LAL following RDA to RDA of MRS operation is CL+BL/2 clock cycles.
UA
BA
0
Low
LAL
LA
1
2
CL + BL/2
3
DESL
4
5
Q0 Q1
Q0 Q1
RDA
6
(opcode)
BA0="0"
BA1="0"
MRS
Valid
7
8
9
I
RSC
10
DESL
TC59LM836DKG-33,-40
= 7 cycles
11
12
2005-11-08 45/65
13
WRA
RDA
UA
BA
14
or
Rev 1.4
LAL
LA
15