xr17v254 Exar Corporation, xr17v254 Datasheet - Page 12

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xr17v254

Manufacturer Part Number
xr17v254
Description
66mhz Pci Bus Quad Uart With Power Management Support
Manufacturer
Exar Corporation
Datasheet

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XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
D3
The V254 enters the state when power is removed from the device. All context is lost in this state and the V254
does not support PME# in this state. When power is restored, PCI RST# must be asserted and the V254 will
return to the D0 Uninitialized state with a full PCI 3.0 compliant power-on reset sequence. The V254 will set all
its registers and outputs to the power-on defaults just as at initial power up. The system software must then
fully initialize and re-configure the V254 to place it in the D0 Active state.
This 32-bit register can be used to store user information and is writable only via the EEPROM. This is
implemented at an offset of 0x48 in the PCI Configuration Space immediately following the Power
Management Registers. This register can be used to store application-specific information which may be used
by the device driver to initialize the device appropriately.
N
F
1.3
OTE
IGURE
A
COLD
DDRESS
: EWR=Read/Write from external EEPROM.
S
4. P
0x48
Special Read/Write Register to store User Information
TATE
O
OWER
FFSET
Active
S
Power on +
PCI RST#
TATE
D0
B
31:0
ITS
T
RANSITIONS OF THE
EWR
T
YPE
T
ABLE
3: S
User Information Writable only through EEPROM
PECIAL
XR17V254
Uninitialized
D3
R
D0
12
EAD
hot
/W
D
RITE
ESCRIPTION
R
EGISTER
VCC Removed
Power on +
PCI RST#
D3
cold
R
0x00000000
ESET
(
HEX
REV. 1.0.0
V
ALUE
)

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