xr17v254 Exar Corporation, xr17v254 Datasheet - Page 24

• Manufacturer Part Number: xr17v254
• Description: 66mhz Pci Bus Quad Uart With Power Management Support
• Manufacturer: Exar Corporation

XR17V254
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
MPIOINT [7:0] (default 0x00)
Enable multipurpose input pin interrupt. If the pin is selected by MPIOSEL as input then bit [0] enables input
pin 0 for interrupt, and bit [7] enables input pin 7. No interrupt is enable if the pin is selected to be an output.
The interrupt is edge sensing and determined by MPIOINV and MPIOLVL registers. The MPIO interrupt clears
after a read to register MPIOLVL. The combination of MPIOLVL and MPIOINV determines the interrupt being
active LOW or active high, it’s level trigger. Logic LOW (default) disables the pin’s interrupt and logic HIGH
enables it.
MPIOLVL [7:0] (default 0x00)
Output pin level control and input level status. The status of the input pin(s) is read on this register and output
pins are controlled on this register. A logic 0 (default) sets the output to LOW and a logic 1 sets the output pin
to HIGH. The MPIO interrupt will clear upon reading this register.
F
IGURE
MPIOINT [7:0]
MPIOLVL [7:0]
Read Input Level
MPIOINV [7:0]
(Input Inversion Enable =1)
MPIOLVL [7:0]
(Output Level)
MPIO3T [7:0]
(3-state Enable =1)
MPIOSEL [7:0]
(Select Input=1, Output=0 )
INT
9. M
ULTIPURPOSE INPUT
AND
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
MPIO7
Multipurpose Input/Output Interrupt Enable
MPIO6
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
Rising Edge
Detection
MPIOINT Register
OR
/
OUTPUT INTERNAL CIRCUIT
1
0
24
AND
Pin [7:0]
MPIO
MPIOCKT
REV. 1.0.0