xr17v254 Exar Corporation, xr17v254 Datasheet - Page 53
xr17v254
Manufacturer Part Number
xr17v254
Description
66mhz Pci Bus Quad Uart With Power Management Support
Manufacturer
Exar Corporation
Datasheet
1.XR17V254.pdf
(70 pages)
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REV. 1.0.0
FCTR [3:0] - Auto RTS/DTR Flow Control Hysteresis Select
These bits select the auto RTS/DTR flow control hysteresis and only valid when TX and RX Trigger Table-D is
selected (FCTR bit [7:6] are set to logic 1). The RTS/DTR hysteresis is referenced to the RX FIFO trigger level.
After reset, these bits are set to logic 0 selecting the next FIFO trigger level for hardware flow control.
below shows the 16 selectable hysteresis levels.
Enhanced features are enabled or disabled using this register. Bits [3:0] provide single or dual consecutive
character software flow control selection (see
are selected, the double 8-bit words are concatenated into two sequential characters. Caution: note that
whenever changing the TX or RX flow control bits, always reset all bits back to logic 0 (disable) before
programming a new setting.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS or DSR Flow Control.
•
•
5.14
Logic 0 = Automatic CTS/DSR flow control is disabled (default).
Logic 1 = Enable Automatic CTS/DSR flow control. Transmission stops when CTS/DSR# pin de-asserts
(HIGH). Transmission resumes when CTS/DSR# pin is asserted (LOW). The selection for CTS# or DSR# is
through MCR bit [2].
FCTR B
Enhanced Feature Register (EFR) - Read/Write
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
T
IT
ABLE
[3]
19: 16 S
FCTR B
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
ELECTABLE
IT
[2]
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
H
FCTR B
YSTERESIS
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 20
IT
[1]
L
EVELS
53
). When the Xon1 and Xon2 and Xoff1 and Xoff2 modes
FCTR B
W
HEN
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
IT
T
[0]
RIGGER
RTS/DTR H
T
ABLE
-D
YSTERESIS
IS
S
+/- 16
+/- 24
+/- 32
+/- 12
+/- 20
+/- 28
+/- 36
+/- 40
+/- 44
+/- 48
+/- 52
+/- 4
+/- 6
+/- 8
+/- 8
ELECTED
0
(
CHARACTERS
XR17V254
Table 19
)