wm8593seft-v Wolfson Microelectronics plc, wm8593seft-v Datasheet - Page 58

• Manufacturer Part Number: wm8593seft-v
• Description: 24-bit 192khz 2vrms Multi-channel Codec
• Manufacturer: Wolfson Microelectronics plc

WM8593
POP AND CLICK PERFORMANCE
w
The WM8593 includes a number of features designed to minimise pops and clicks in various phases
of operation including power up, power down, changing analogue paths and starting/stopping clocks.
In order to ensure optimum performance, the following sequences should be followed.
POWERUP SEQUENCE
1.
2.
3.
4.
5.
6.
7.
8.
9.
Apply power to the WM8593 (see Power On Reset).
Set-up initial internal biases:
•
•
•
•
Enable output drivers to allow the AC coupling capacitors at the output stage to be pre-
charged to DACVMID:
•
•
Enable DACVMID. 750k selected here for optimum pop reduction:
•
Wait until DACVMID has fully charged. The time is dependent on the capacitor values
used to AC-couple the outputs and to decouple DACVMID, and the VMID_SEL value
chosen. An approximate delay of 6xRCms can be used, where R is the DACVMID
resistance (between AVDD1 and DACVMID) and C is the decoupling capacitor on
DACVMID, although this time should be determined by the customer using the exact
application configuration for best results.
•
Enable the master bias and DACVMID buffer:
•
Switch the output drivers to use the master bias instead of the power up (fast) bias:
•
Enable all functions (DACs, ADC, PGAs) required for use. Outputs are muted by default so
the write order is not important.
Unmute the PGAs and switch DACVMID resistance to 50k for normal operation:
•
•
•
SOFT_ST=1
FAST_EN=1
POBCTRL=1
BUFIO_EN=1
VOUTxL_EN=1
VOUTxR_EN=1
VMID_SEL=10
Insert delay
BIAS_EN=1
POBCTRL=0
PGAxL_MUTE=0
PGAxR_MUTE=0
VMID_SEL=01
PD Rev 4.0 April 2008
Pre-Production
58