wm8593seft-v Wolfson Microelectronics plc, wm8593seft-v Datasheet - Page 93

• Manufacturer Part Number: wm8593seft-v
• Description: 24-bit 192khz 2vrms Multi-channel Codec
• Manufacturer: Wolfson Microelectronics plc

Production Data
R44 (2Ch) – Audio Interface MUX Configuration Register 8 (AIF_MUX8)
Figure 63 R44 – Audio Interface MUX Configuration Register 8
w
Default
Default
Write
Write
ADCMCLK_SEL[2:0]
Read
Read
Bit #
Bit #
ADCWORDCLK_
ADC_FORCE
ADC_UPD
Function
SEL[2:0]
N/A
N/A
15
0
7
0
0
0
Force ADC Clocks to Change
0 = Wait until clocks are safe before switching between clock sources
1 = Force clock sources to change immediately
See Table 41 for details of use.
ADCMCLK Select
000 = Use MCLK1
001 = Use MCLK2
010 = Use MCLK3
011 = Use MCLK4
100 = Use MCLK5
101 to 111 = Reserved
ADCBCLK and ADCLRCLK Select
000 = Use BCLK1 and LRCLK1
001 = Use BCLK2 and LRCLK2
010 = Use BCLK3 and LRCLK3
011 = Use BCLK4 and LRCLK4
100 = Use BCLK5 and LRCLK5
101 = Use DAC1BCLK and DAC1LRCLK (when DAC1 is in master mode)
110 = Use DAC2BCLK and DAC2LRCLK (when DAC2 is in master mode)
111 = Output ADCBCLK and ADCBCLK (when ADC is master mode)
ADC Clock Update
0 = Latch corresponding ADC clock settings into Register Map but do not update
1 = Latch corresponding ADC clock settings into Register Map and update all simultaneously
N/A
14
0
0
6
1
ADCWORDCLK_SEL[2:0]
N/A
13
0
0
5
0
N/A
12
0
0
4
0
Description
N/A
11
0
3
0
1
N/A = Not Applicable (no function implemented)
ADCMCLK_SEL[2:0]
ADC_UPD
10
0
2
0
N/A
9
0
1
1
0
PD Rev 4.0 April 2008
WM8593
FORCE
ADC_
N/A
8
0
0
0
0
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