m24lr16e-r STMicroelectronics, m24lr16e-r Datasheet - Page 40

• Manufacturer Part Number: m24lr16e-r
• Description: 16 Kbit Eeprom With Password Protection, Dual Interface & Energy Harvesting 400 Khz I²c Bus & Iso 15693 Rf Protocol At 13.56 Mhz
• Manufacturer: STMicroelectronics

I
5.16
5.16.1
Figure 12. I
40/143
2
C device operation
M24LR16E-R I
The M24LR16E-R controls I
the 64-bit I2C_Write_Lock bit area. The I
commands: I
I
The I
M24LR16E-R in order to modify the write access rights of all the memory sectors protected
by the I2C_Write_Lock bits, including the password itself. If the presented password is
correct, the access rights remain activated until the M24LR16E-R is powered off or until a
new I
Following a Start condition, the bus master sends a device select code with the Read/Write
bit (RW) reset to 0 and the Chip Enable bit E2 at 1. The device acknowledges this, as shown
in
responds to each address byte with an acknowledge bit, and then waits for the four
password data bytes, the validation code, 09h, and a resend of the four password data
bytes. The most significant byte of the password is sent first, followed by the least significant
bytes.
It is necessary to send the 32-bit password twice to prevent any data corruption during the
sequence. If the two 32-bit passwords sent are not exactly the same, the M24LR16E-R does
not start the internal comparison.
When the bus master generates a Stop condition immediately after the Ack bit (during the
tenth bit time slot), an internal delay equivalent to the write cycle time is triggered. A Stop
condition at any other time does not trigger the internal delay. During that delay, the
M24LR16E-R compares the 32 received data bits with the 32 bits of the stored I
password. If the values match, the write access rights to all protected sectors are modified
after the internal delay. If the values do not match, the protected sectors remains protected.
During the internal delay, the serial data (SDA) signal is disabled internally, and the device
does not respond to any requests.
2
2
C present password command
C present password command description
Figure
2
2
C present password command is used in I
C present password command is issued.
12, and waits for two I
2
C present password and I
2
C password security
2
C sector write access using the 32-bit-long I
Doc ID 018932 Rev 7
2
C password address bytes 09h and 00h. The device
2
C write password.
2
C password value is managed using two I
2
C mode to present the password to the
2
C password and
2
M24LR16E
C
2
C