m24lr16e-r STMicroelectronics, m24lr16e-r Datasheet - Page 94
m24lr16e-r
Manufacturer Part Number
m24lr16e-r
Description
16 Kbit Eeprom With Password Protection, Dual Interface & Energy Harvesting 400 Khz I²c Bus & Iso 15693 Rf Protocol At 13.56 Mhz
Manufacturer
STMicroelectronics
Datasheet
1.M24LR16E-R.pdf
(143 pages)
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Command codes
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Figure 61. Write AFI frame exchange between VCD and M24LR16E-R
When configured in the RF busy mode, the RF WIP/BUSY pin is tied to 0 from the SOF that
starts the Write AFI command to the end of the M24LR16E-R response.
When configured in the RF write in progress mode, the RF WIP/BUSY pin is tied to 0 for the
duration of the internal write cycle (from the end of a valid Write AFI command to the
beginning of the M24LR16E-R response).
Lock AFI
On receiving the Lock AFI request, the M24LR16E-R locks the AFI value permanently. The
Option_flag is supported.
During the RF write cycle W
otherwise, the M24LR16E-R may not Lock correctly the AFI value in memory. The W
equal to t
Table 60.
1. Gray means that the field is optional.
Request parameter:
●
●
Table 61.
Response parameter:
●
Request
Response
M24LR16E-R
M24LR16E-R
SOF
SOF
Request Flags
UID (optional)
No parameter
VCD
1nom
Request_
Lock AFI request format
Lock AFI response format when Error_flag is NOT set
flags
8 bits
+ 18 × 302 µs.
Response_flags
SOF
8 bits
Lock
AFI
28h
Write AFI
request
t
, there should be no modulation (neither 100% nor 10%),
Doc ID 018932 Rev 7
EOF
<------------------ W
<-t
1
-> SOF
64 bits
UID
(1)
CRC16
16 bits
Write AFI
response
t
--------------> SOF
EOF
CRC16
16 bits
Write AFI
response
Write sequence
when error
M24LR16E
Response
Request
t
EOF
EOF
time is
EOF
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