m24lr16e-r STMicroelectronics, m24lr16e-r Datasheet - Page 51

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m24lr16e-r

Manufacturer Part Number
m24lr16e-r
Description
16 Kbit Eeprom With Password Protection, Dual Interface & Energy Harvesting 400 Khz I²c Bus & Iso 15693 Rf Protocol At 13.56 Mhz
Manufacturer
STMicroelectronics
Datasheet

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M24LR16E
9.3
9.4
VCD to M24LR16E-R frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The M24LR16E-R is ready to receive a new command frame from the VCD 311.5 µs (t
after sending a response frame to the VCD.
The M24LR16E-R takes a power-up time of 0.1 ms after being activated by the powering
field. After this delay, the M24LR16E-R is ready to receive a command frame from the VCD.
Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in
SOF sequence described in
sequence for either coding mode is described in
Figure 20. SOF to select 1 out of 256 data coding mode
Figure 21. SOF to select 1 out of 4 data coding mode
9.44µs
9.44µs
37.76µs
37.76µs
Figure 21
Doc ID 018932 Rev 7
Figure 20
selects the 1 out of 4 data coding mode. The EOF
selects the 1 out of 256 data coding mode. The
9.44µs
Figure
9.44µs
22.
37.76µs
Data rate and data coding
37.76µs
9.44µs
AI06661
AI06660
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