lfsc3ga15e-7f900c Lattice Semiconductor Corp., lfsc3ga15e-7f900c Datasheet - Page 3

• Manufacturer Part Number: lfsc3ga15e-7f900c
• Description: Latticesc/m Fpga Data Sheets
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Table 1-1. LatticeSC Family Selection Guide
The LatticeSCM devices add MACO-enabled IP functionality to the base LatticeSC devices. Table 1-2 shows the
type and number of each pre-engineered IP core.
Table 1-2. LatticeSCM Family
Introduction
The LatticeSC family of FPGA combines a high-performance FPGA fabric, high-speed SERDES, high-perfor-
mance I/Os and large embedded RAM in a single industry leading architecture. This FPGA family is fabricated in a
state of the art technology to provide one of the highest performing FPGAs in the industry.
This family of devices includes features to meet the needs of today’s communication network systems. These fea-
tures include SERDES with embedded advance PCS (Physical Coding sub-layer), up to 7.8 Mbits of sysMEM
embedded block RAM, dedicated logic to support system level standards such as RAPIDIO, HyperTransport,
SPI4.2, SFI-4, UTOPIA, XGMII and CSIX. The devices in this family feature clock multiply, divide and phase shift
PLLs, numerous DLLs and dynamic glitch free clock MUXs which are required in today’s high end system designs.
High speed, high bandwidth I/O make this family ideal for high throughput systems.
LUT4s (K)
sysMEM Blocks (18Kb)
Embedded Memory (Mbits)
Max. Distributed Memory (Mbits)
Number of 3.8Gbps SERDES (Max.)
DLLs
Analog PLLs
MACO Blocks
Package I/O/SERDES Combinations (1mm ball pitch)
256-ball fpBGA (17 x 17mm)
900-ball fpBGA (31 x 31mm)
1020-ball fcBGA (33 x 33mm)
1152-ball fcBGA (35 x 35mm)
1704-ball fcBGA (42.5 x 42.5mm)
Note: The information in this preliminary data sheet is by definition not final and subject to change. Please consult the Lat-
tice website and your local Lattice sales manager to ensure you have the latest information regarding the specifications for
these products as you make critical design decisions.
flexiMAC Blocks
SPI4.2 Blocks
Memory Controller Blocks
Low Speed CDR Blocks
PCI Express LTSSM (PHY) Blocks
Note: See each IP core user’s guide for more information about support for specific LatticeSCM devices.
• 1GbE Mode
• 10GbE Mode
• PCI Express Mode
• DDR/DDR2 DRAM Mode
• QDR II/II+ SRAM Mode
• RLDRAM I
• RLDRAM II CIO/SIO
Device
Device
SCM15
SC15
139/4
300/8
1
1
1
0
1
1.03
0.24
15
56
12
8
8
4
1-2
SCM25
476/16
SC25
378/8
2
2
2
0
0
1.92
0.41
104
25
16
12
8
6
SCM40
562/16
604/16
SC40
2
2
2
2
2
3.98
0.65
216
40
16
12
10
LatticeSC/M Family Data Sheet
8
SCM80
660/16
904/32
SC80
2
2
2
2
2
5.68
1.28
308
80
12
10
32
8
SCM115
SC115
660/16
942/32
4
2
2
2
2
1.84
Introduction
115
424
7.8
32
12
12
8