zl50019gag2 Zarlink Semiconductor, zl50019gag2 Datasheet - Page 65

• Manufacturer Part Number: zl50019gag2
• Description: Enhanced 2 K Digital Switch With Stratum 4e Dpll
• Manufacturer: Zarlink Semiconductor

Reset Value: 0000
External Read/Write Address: 0041
5 - 3
2 - 0
Bit
15
0
14
0
R1F2 - 0
R0F2 - 0
Name
H
13
0
Table 29 - Reference Frequency Register (RFR) Bits (continued)
Reference 1 Frequency Bits
When the RFRE bit of the DPLLCR register is high, these bits are used to select the
REF1 input frequency. When the RFRE bit is low, these bits are ignored.
Reference 0 Frequency Bits
When the RFRE bit of the DPLLCR register is high, these bits are used to select the
REF0 input frequency. When the RFRE bit is low, these bits are ignored.
12
0
H
R3F2
11
R3F1
10
R1F2
R0F2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
R3F0
9
Zarlink Semiconductor Inc.
ZL50019
R2F2
R1F1
R0F1
8
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
65
R2F1
7
R1F0
R0F0
Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R2F0
6
REF 1 Input Frequency
REF 0 Input Frequency
R1F2
5
16.384 MHz
16.384 MHz
1.544 MHz
2.048 MHz
4.096 MHz
8.192 MHz
19.44 MHz
1.544 MHz
2.048 MHz
4.096 MHz
8.192 MHz
19.44 MHz
Reserved
Reserved
R1F1
8 kHz
8 kHz
4
R1F0
3
R0F2
2
R0F1
Data Sheet
1
R0F0
0