s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 74

• Manufacturer Part Number: s71ws512ne0bfwzz
• Description: Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
• Manufacturer: Meet Spansion Inc.

Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection
3. Data are invalid for addresses in a Program Suspended sector.
4. DQ1 indicates the Write to Buffer ABORT status during Write Buffer Programming operations.
5. The data-bar polling algorithm should be used for Write Buffer Programming operations. Note that DQ7#
74
Standard
Program
Suspend
(Note 3)
Suspend
(Note 5)
Write to
Buffer
timing limits. Refer to the section on DQ5 for more information.
for further details.
during Write Buffer Programming indicates the data-bar for DQ7 data for the LAST LOADED WRITE-
BUFFER ADDRESS location.
Erase
Mode
Mode
Mode
Embedded Program Algorithm
Reading within Program Suspended
Sector
Reading within Non-Program
Suspended Sector
BUSY State
Exceeded Timing Limits
ABORT State
Erase-Suspend-
Embedded Erase Algorithm
Read
Erase-Suspend-Program
Status
S29WSxxxN MirrorBit™ Flash Family For Multi-chip Products (MCP) S71WS512NE0BFWZZ_00_ A1 June 28, 2004
Suspended Sector
Suspended Sector
Non-Erase
Erase
Table 20. Write Operation Status
A d v a n c e
(Note 2)
Allowed)
INVALID
DQ7#
DQ7#
DQ7#
DQ7#
DQ7#
Data
Data
DQ7
(Not
0
1
No toggle
I n f o r m a t i o n
INVALID
Allowed)
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
Data
Data
DQ6
(Not
(Note 1)
INVALID
Allowed)
Data
Data
DQ5
(Not
0
0
0
0
0
1
0
Allowed)
INVALID
Data
Data
DQ3
N/A
(Not
N/A
N/A
N/A
N/A
N/A
1
No toggle
(Note 2)
INVALID
Allowed)
Toggle
Toggle
Data
Data
DQ2
(Not
N/A
N/A
N/A
N/A
(Note 4)
Allowed)
INVALID
Data
Data
DQ1
(Not
N/A
N/A
N/A
0
0
0
1