s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 80

• Manufacturer Part Number: s71ws512ne0bfwzz
• Description: Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
• Manufacturer: Meet Spansion Inc.

Notes:
1. Addresses are latched on the first of either the active edge of CLK or the rising edge of AVD#.
2. Clock Divider option
80
JEDEC
Parameter
Synchronous/Burst Read @ V
Standard
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BACC
RDYS
RACC
IACC
t
t
BDH
ACS
ACH
CEZ
OEZ
CES
AAS
AAH
CAS
AVC
AVD
CKA
CKZ
OES
RCC
CR
OE
Burst Access Time Valid Clock to Output Delay
S29WSxxxN MirrorBit™ Flash Family For Multi-chip Products (MCP) S71WS512NE0BFWZZ_00_ A1 June 28, 2004
Address Setup Time to AVD#
Data Hold Time from Next Clock Cycle
Address Hold Time from CLK
Address Hold Time to AVD#
Address Setup Time to CLK
Read cycle for continuous suspend
Output Enable to Output Valid
Ready Access Time from CLK
Output Enable Setup Time
CE# Setup Time to AVD#
Chip Enable to RDY Valid
Output Enable to High Z
CE# Setup Time to CLK
RDY Setup Time to CLK
CLK to access resume
Chip Enable to High Z
AVD# Low to CLK
CLK to High Z
AVD# Pulse
A d v a n c e
Description
Latency
IO
= 1.8 V
(Note 1)
(Note 1)
(Note 1)
(Note 1)
I n f o r m a t i o n
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
54 MHz
13.5
13.5
13.5
13.5
13.5
10
10
12
10
5
7
4
5
5
5
7
5
5
69
0
1
66 MHz
11.2
11.2
11.2
11.2
11.2
10
4
6
3
8
8
4
4
4
6
4
8
4
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns