ppc440gp-3rc500cz Applied Micro Circuits Corporation (AMCC), ppc440gp-3rc500cz Datasheet - Page 52

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ppc440gp-3rc500cz

Manufacturer Part Number
ppc440gp-3rc500cz
Description
Power Pc 440gp Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
440GP – Power PC 440GP Embedded Processor
52
Signal Functional Description
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V, 10kΩ to 5V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
UART1_RTS/DTR
IIC Peripheral Interface
IIC0SClk
IIC0SDA
IIC1SClk
IIC1SDA
Interrupts Interface
IRQ00:10
IRQ11:12
JTAG Interface
TCK
TDI
TDO
TMS
TRST
Signal Name
UART1 Request To Send or Data Terminal Ready. The choice is
determined by a DCR register bit setting.
IIC0 Serial Clock.
IIC0 Serial Data.
IIC1 Serial Clock.
IIC1 Serial Data.
External interrupt Requests 0 through 10.
External interrupt Requests 11 through 12.
Test Clock.
Test Data In.
Test Data Out.
Test Mode Select.
Test Reset. During chip power-up, this signal must be low from the
start of V
stable in order to initialize the JTAG controller.
DD
ramp-up until at least 16 SysClk cycles after V
(Sheet 5 of 7)
Description
DD
is
I/O
I/O
I/O
I/O
I/O
I/O
Revision 1.08 – April 3, 2008
O
I
I
I
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V CMOS
3.3V CMOS
3.3V LVTTL
3.3V CMOS
3.3V CMOS
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
3.3V PCI
w/pull-up
w/pull-up
w/pull-up
w/pull-up
Type
Data Sheet
Notes
1, 4
1, 2
1, 2
1, 2
1, 2
1, 5
1
1
5
4
AMCC

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