ppc440gp-3rc500cz Applied Micro Circuits Corporation (AMCC), ppc440gp-3rc500cz Datasheet - Page 65

• Manufacturer Part Number: ppc440gp-3rc500cz
• Description: Power Pc 440gp Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

I/O Specifications—All Speeds
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133MHz. PCI-X input setup time requirement is 1.2ns for 133MHz and
3. The clock frequency for RMII operation is 50MHz ± 100ppm.
Revision 1.08 – April 3, 2008
AMCC
PCI-X Interface
PCIXAD00:63
PCIXC3:0[BE3:0]
PCIXParLow
PCIParHigh
PCIXFrame
PCIXINT
PCIXIRDY
PCIXTRDY
PCIXStop
PCIXDevSel
PCIXIDSel
PCIXPErr
PCIXSErr
PCIXClk
PCIXReset
PCIXReq64
PCIXAck64
PCIXCap
PCIX133Cap
PCIXM66En
PCIXReq0:5
PCIXGnt0:5
Data Sheet
1.7ns for 66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66MHz. PCI output hold time
requirement is 1ns for 66MHz and 2ns for 33MHz.
Signal
Setup Time
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
Note 2 (3)
(T
Note 2 (3
IS
na)
na
dc
na
min)
Input (ns)
Hold Time
(T
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
0.5 (0)
IH
na
dc
na
na
min)
(Sheet 1 of 4)
Valid Delay
(T
OV
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8 (6)
3.8
na
dc
na
na
na
na
na
max)
Output (ns)
440GP – Power PC 440GP Embedded Processor
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
0.7 (Note 2)
Hold Time
(T
OH
0.7
dc
na
na
na
na
na
na
min)
(minimum)
Output Current (mA)
I/O H
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
na
na
na
na
na
na
(minimum)
I/O L
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
na
na
na
na
na
na
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
PCIXClk
Clock
Notes
async
async
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
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