ppc440gp-3rc500cz Applied Micro Circuits Corporation (AMCC), ppc440gp-3rc500cz Datasheet - Page 61
ppc440gp-3rc500cz
Manufacturer Part Number
ppc440gp-3rc500cz
Description
Power Pc 440gp Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet
1.PPC440GP-3RC500CZ.pdf
(83 pages)
- Current page: 61 of 83
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Revision 1.08 – April 3, 2008
Spread Spectrum Clocking
Care must be taken when using a spread spectrum clock generator (SSCG) with the PPC440GP. This controller
uses a PLL for clock generation inside the chip. The accuracy with which the PLL follows the SSCG is referred to
as tracking skew. The PLL bandwidth and phase angle determine how much tracking skew there is between the
SSCG and the PLL for a given frequency deviation and modulation frequency. When using an SSCG with the
PPC440GP the following conditions must be met:
Notes:
Important: It is up to the system designer to ensure that any SSCG used with the PPC440GP meets the above
AMCC
Data Sheet
• The frequency deviation must not violate the minimum clock cycle time. Therefore, when operating the
• The maximum frequency deviation cannot exceed −3%, and the modulation frequency cannot exceed 40kHz.
• Use the Peripheral Bus Clock for logic that is synchronous to the peripheral bus since this clock tracks the
• Use the DDR SDRAM MemClkOut since it also tracks the modulation.
PPC440GP with one or more internal clocks at their maximum supported frequency, the SSCG can only lower
the frequency.
In some cases, on-board PPC440GP peripherals impose more stringent requirements.
modulation.
1. The serial port baud rates are synchronous to the modulated clock. The serial port has a tolerance of
2. Ethernet operation is unaffected.
3. IIC operation is unaffected.
approximately 1.5% on baud rate before framing errors begin to occur. The 1.5% tolerance assumes that
the connected device is running at precise baud rates.
requirements and does not adversely affect other aspects of the system.
440GP – Power PC 440GP Embedded Processor
61
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