M25P05-AVDW6G NUMONYX [Numonyx B.V], M25P05-AVDW6G Datasheet - Page 36
M25P05-AVDW6G
Manufacturer Part Number
M25P05-AVDW6G
Description
512 Kbit, serial Flash memory, 50 MHz SPI bus interface
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.M25P05-AVDW6G.pdf
(52 pages)
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Initial delivery state
8
36/52
Figure 20. Power-up timing
Table 8.
1. These parameters are characterized only.
Initial delivery state
The device is delivered with the memory array erased: all bits are set to ‘1’ (each byte
contains FFh). The status register contains 00h (all status register bits are 0).
V CC (max)
V CC (min)
Symbol
t
t
V
PUW
VSL
WI
V WI
(1)
(1)
V CC
(1)
V
Time delay to Write instruction
Write inhibit voltage
Reset state
CC
Power-up timing and V
device
of the
(min) to S low
Program, erase and write commands are rejected by the device
Chip selection not allowed
Parameter
WI
threshold
tPUW
tVSL
Read access allowed
Min
10
1
1
Device fully
accessible
Max
10
2
M25P05-A
time
AI04009C
Unit
ms
µs
V
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