ST72F63 STMICROELECTRONICS [STMicroelectronics], ST72F63 Datasheet - Page 124

• Manufacturer Part Number: ST72F63
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7263B
15 DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in ROM
versions, in user programmable versions (FLASH)
as well as in factory coded versions (FASTROM).
FLASH devices are shipped to customers with a
default content (FFh), while ROM factory coded
parts contain the code supplied by the customer.
This implies that FLASH devices have to be con-
figured by the customer using the Option Byte
while the ROM devices are factory-configured.
The FASTROM or ROM contents are to be sent on
diskette, or by electronic means, with the hexadec-
imal file in .S19 format generated by the develop-
ment tool. All unused bytes must be set to FFh.
The selected options are communicated to STMi-
croelectronics using the correctly completed OP-
TION LIST appended.
The STMicroelectronics Sales Organization will be
pleased to provide detailed information on con-
tractual points.
15.1 OPTION BYTE
The Option Byte allows the hardware configuration
of the microcontroller to be selected.
The Option Byte has no address in the memory
map and can be accessed only in programming
mode using a standard ST7 programming tool.
The default contents of the FLASH is fixed to FFh.
This means that all the options have “1” as their
default value.
In ROM devices, the Option Byte is fixed in hard-
ware by the ROM code.
OPTION BYTE
OPT 7:6 = Reserved.
124/132
--
7
--
WDG
SW
HALT
WD
LVD
--
24/12
OSC
FMP_
R
0
OPT 5 = WDGSW Hardware or Software Watch-
dog
This option bit selects the watchdog type.
0: Hardware enabled
1: Software enabled
OPT 4 = WDHALT Watchdog and HALT mode
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT 3 = LVD Low Voltage Detector selection
This option bit selects the LVD.
0: LVD enabled
1: LVD disabled
OPT 2 = Reserved.
OPT 1 = OSC24/12 Oscillator Selection
This option bit selects the clock divider used to
drive the USB interface at 6MHz.
0: 24 MHz oscillator
1: 12 Mhz oscillator
OPT 0 = FMP_R Flash memory read-out protec-
tion
This option indicates if the user flash memory is
protected against read-out piracy. This protection
is based on a read and write protection of the
memory in test modes and IAP. Erasing the option
bytes when the FMP_R option is selected, causes
the whole user memory to be erased first.
0: Read-out protection enabled
1: Read-out protection disabled