hd66100 Renesas Electronics Corporation., hd66100 Datasheet - Page 215
hd66100
Manufacturer Part Number
hd66100
Description
H8/3867 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HD66100.pdf
(495 pages)
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Bit 3: Toggle output level L (TOLL)
Bit 3 sets the TMOFL pin output level. The output level is effective immediately after this bit is
written.
Bit 3
TOLL
0
1
Bits 2 to 0: Clock select L (CKSL2 to CKSL0)
Bits 2 to 0 select the clock input to TCFL from among four internal clock sources or external event
input.
Bit 2
CKSL2
0
0
0
0
1
1
1
1
Note: * External event edge selection is set by IEG3 in the IRQ edge select register (IEGR). For
200
details, see 1. IRQ edge select register (IEGR) in section 3.3.2.
Note that the timer F counter may increment if the setting of IRQ3 in port mode register 1
(PMR1) is changed from 0 to 1 while the TMIF pin is low in order to change the TMIF pin
function.
Bit 1
CKSL1
0
0
1
1
0
0
1
1
Description
Low level
High level
Bit 0
CKSL0
0
1
0
1
0
1
0
1
Description
Counting on external event (TMIF) rising/
falling edge*
Use prohibited
Internal clock: counting on ø/32
Internal clock: counting on ø/16
Internal clock: counting on ø/4
Internal clock: counting on øw/4
(initial value)
(initial value)
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