hd66100 Renesas Electronics Corporation., hd66100 Datasheet - Page 233

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hd66100

Manufacturer Part Number
hd66100
Description
H8/3867 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Bit 7: Timer overflow flag H (OVFH)
Bit 7 is a status flag indicating that TCG has overflowed from H'FF to H'00 when the input capture
input signal is high. This flag is set by hardware and cleared by software. It cannot be set by
software.
Bit 7
OVFH
0
1
Bit 6: Timer overflow flag L (OVFL)
Bit 6 is a status flag indicating that TCG has overflowed from H'FF to H'00 when the input capture
input signal is low, or in interval operation. This flag is set by hardware and cleared by software.
It cannot be set by software.
Bit 6
OVFL
0
1
Bit 5: Timer overflow interrupt enable (OVIE)
Bit 5 selects enabling or disabling of interrupt generation when TCG overflows.
Bit 5
OVIE
0
1
218
Description
Clearing conditions:
After reading OVFH = 1, cleared by writing 0 to OVFH
Setting conditions:
Set when TCG overflows from H'FF to H'00
Description
Clearing conditions:
After reading OVFL = 1, cleared by writing 0 to OVFL
Setting conditions:
Set when TCG overflows from H'FF to H'00
Description
TCG overflow interrupt request is disabled
TCG overflow interrupt request is enabled
(initial value)
(initial value)
(initial value)

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