hd66100 Renesas Electronics Corporation., hd66100 Datasheet - Page 232

• Manufacturer Part Number: hd66100
• Description: H8/3867 Series
• Manufacturer: Renesas Electronics Corporation.

3. Input capture register GR (ICRGR)
ICRGR is an 8-bit read-only register. When a rising edge of the input capture input signal is
detected, the current TCG value is transferred to ICRGR. If IIEGS in TMG is 1 at this time,
IRRTG is set to 1 in IRR2, and if IENTG in IENR2 is 1, an interrupt request is sent to the CPU.
For details of the interrupt, see 3.3, Interrupts.
To ensure dependable input capture operation, the pulse width of the input capture input signal
must be at least 2ø or 2ø
ICRGR is initialized to H'00 upon reset.
4.
TMG is an 8-bit read/write register that performs TCG clock selection from four internal clock
sources, counter clear selection, and edge selection for the input capture input signal interrupt
request, controls enabling of overflow interrupt requests, and also contains the overflow flags.
TMG is initialized to H'00 upon reset.
Bit:
Initial value:
Read/Write:
Bit:
Initial value:
Read/Write:
Note: * Bits 7 and 6 can only be written with 0, for flag clearing.
Timer mode register G (TMG)
ICRGR7
OVFH
R/W*
R
7
0
7
0
SUB
ICRGR6
R/W*
OVFL
R
6
0
6
0
(when the noise canceler is not used).
ICRGR5
OVIE
R/W
R
5
0
5
0
ICRGR4
IIEGS
R/W
R
4
0
4
0
ICRGR3
CCLR1
R/W
R
3
0
3
0
ICRGR2
CCLR0
R/W
R
2
0
2
0
ICRGR1
CKS1
R/W
R
1
0
1
0
ICRGR0
CKS0
R/W
R
0
0
0
0
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