nm34c02 Fairchild Semiconductor, nm34c02 Datasheet - Page 10

• Manufacturer Part Number: nm34c02
• Description: 2k-bit Standard 2-wire Bus Interface
• Manufacturer: Fairchild Semiconductor

NM34C02 Rev. D.2
Note:
Read Operations
operations increments all word address bits, allowing the entire
memory contents to be serially read during one operation. After
the entire memory has been read, the counter 'rolls over' and the
NM34C02 continues to output data for each acknowledge re-
ceived. Refer to Figure 10 for the address, acknowledge, and data
transfer sequence.
Bus Activity:
Due to open drain configuration of SDA, a bus-level resistor is called for (Typical value = 4.7 )
SDA Line
Bus Activity:
Master
SDA Line
Master
SDA
SCL
Address
Slave
Transmitter/
R
S
T
A
T
Receiver
Master
C
A
K
(Continued)
ADDRESS
Bus Activity:
Master
SDA Line
SLAVE
Data n
Typical System Configuration (Figure 11).
Receiver
Slave
Current Address Read (Figure 8).
Sequential Read (Figure 10).
A
C
K
R
S
T
A
T
A
C
K
Random Read (Figure 9).
ADDRESS
ADDRESS
BYTE
Data n +1
SLAVE
Transmitter/
Receiver
Slave
10
A
C
K
C
A
K
A
C
K
S
T
A
R
T
S
Transmitter
Data n + 2
Master
ADDRESS
DATA
SLAVE
A
C
K
Transmitter/
Receiver
A
C
K
Master
S
O
P
T
DATA n
Data n + x
V CC
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S
O
P
T
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DS012821-20
O
S
T
P