h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 22

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h8s-2169

Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
16.3 Operation .......................................................................................................................... 523
16.4 Usage Notes ...................................................................................................................... 545
Section 17 Keyboard Buffer Controller
17.1 Overview........................................................................................................................... 559
17.2 Register Descriptions ........................................................................................................ 562
17.3 Operation .......................................................................................................................... 567
Section 18A Host Interface
18A.1 Overview.......................................................................................................................... 581
Rev. 3.00 Jan 18, 2006 page xxii of xxviii
16.3.1 I
16.3.2 Master Transmit Operation .................................................................................. 525
16.3.3 Master Receive Operation.................................................................................... 527
16.3.4 Slave Receive Operation...................................................................................... 530
16.3.5 Slave Transmit Operation .................................................................................... 532
16.3.6 IRIC Setting Timing and SCL Control ................................................................ 534
16.3.7 Automatic Switching from Formatless Mode to I
16.3.8 Operation Using the DTC .................................................................................... 537
16.3.9 Noise Canceler ..................................................................................................... 538
16.3.10 Sample Flowcharts............................................................................................... 538
16.3.11 Initialization of Internal State .............................................................................. 543
17.1.1 Features................................................................................................................ 559
17.1.2 Block Diagram ..................................................................................................... 560
17.1.3 Input/Output Pins ................................................................................................. 561
17.1.4 Register Configuration......................................................................................... 561
17.2.1 Keyboard Control Register H (KBCRH) ............................................................. 562
17.2.2 Keyboard Control Register L (KBCRL) .............................................................. 564
17.2.3 Keyboard Data Buffer Register (KBBR) ............................................................. 566
17.2.4 Module Stop Control Register (MSTPCR) .......................................................... 567
17.3.1 Receive Operation................................................................................................ 567
17.3.2 Transmit Operation .............................................................................................. 569
17.3.3 Receive Abort ...................................................................................................... 572
17.3.4 KCLKI and KDI Read Timing............................................................................. 575
17.3.5 KCLKO and KDO Write Timing......................................................................... 576
17.3.6 KBF Setting Timing and KCLK Control ............................................................. 577
17.3.7 Receive Timing.................................................................................................... 578
17.3.8 KCLK Fall Interrupt Operation............................................................................ 579
17.3.9 Usage Note........................................................................................................... 580
18A.1.1 Features............................................................................................................ 581
18A.1.2 Block Diagram ................................................................................................. 582
2
C Bus Data Format ............................................................................................ 523
X-Bus Interface (XBS)
............................................................................. 581
........................................................................ 559
2
C Bus Format ........................ 536

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