h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 382
h8s-2169
Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2169.pdf
(1075 pages)
- Current page: 382 of 1075
- Download datasheet (6Mb)
Section 12 8-Bit Timers
Bit 5—Timer Overflow Interrupt Enable (OVIE): Selects whether the OVF interrupt request
(OVI) is enabled or disabled when the OVF flag in TCSR is set to 1.
Note that an OVI interrupt is not requested by TMRX, regardless of the OVIE value.
Bit 5
OVIE
0
1
Bits 4 and 3—Counter Clear 1 and 0 (CCLR1, CCLR0): These bits select the method by which
the timer counter is cleared: by compare-match A or B, or by an external reset input.
Bit 4
CCLR1
0
1
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select whether the clock input to
TCNT is an internal or external clock.
The input clock can be selected from either six or three clocks, all divided from the system clock
( ). The falling edge of the selected internal clock triggers the count.
When use of an external clock is selected, three types of count can be selected: at the rising edge,
the falling edge, and both rising and falling edges.
Some functions differ between channel 0 and channel 1, because of the cascading function.
Rev. 3.00 Jan 18, 2006 page 354 of 1044
REJ09B0280-0300
Description
OVF interrupt request (OVI) is disabled
OVF interrupt request (OVI) is enabled
Bit 3
CCLR0
0
1
0
1
Description
Clearing is disabled
Cleared on compare-match A
Cleared on compare-match B
Cleared on rising edge of external reset input
(Initial value)
(Initial value)
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