h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 650
h8s-2169
Manufacturer Part Number
h8s-2169
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2169.pdf
(1075 pages)
- Current page: 650 of 1075
- Download datasheet (6Mb)
Section 18B Host Interface LPC Interface (LPC)
18B.2.7 Two-Way Data Registers (TWR0 to TWR15)
Bit
Initial value
Slave Read/Write
Host Read/Write
Bit
Initial value
Slave Read/Write
Host Read/Write
Bit
Initial value
Slave Read/Write
Host Read/Write
TWR0 to TWR15 are sixteen 8-bit readable/writable registers to both the slave processor and the
host processor. In TWR0, however, two registers (TWR0MW and TWR0SW) are allocated to the
same address for both the host address and the slave address. TWR0MW is a write-only register to
the host processor, and a read-only register to the slave processor, while TWR0SW is a write-only
register to the slave processor and a read-only register to the host processor. When the host and
slave processors begin a write, after the respective TWR0 registers have been written to, access
right arbitration for simultaneous access is performed by checking the status flags to see if those
writes were valid. For the registers selected from the host according to the I/O address, see section
18B.2.4, LPC Channel 3 Address Register (LADR3).
Data transferred in an LPC I/O write cycle is written to the selected register; in an LPC I/O read
cycle, the data in the selected register is transferred to the host.
Rev. 3.00 Jan 18, 2006 page 622 of 1044
REJ09B0280-0300
TWR0MW
TWR0SW
TWR1 to TWR15
Bit 7
Bit 7
Bit 7
R/W
R/W
—
—
—
W
W
R
R
7
7
7
Bit 6
Bit 6
Bit 6
R/W
R/W
—
W
—
W
—
R
R
6
6
6
Bit 5
Bit 5
Bit 5
R/W
R/W
—
W
—
W
—
R
R
5
5
5
Bit 4
Bit 4
Bit 4
R/W
R/W
—
W
—
W
—
R
R
4
4
4
Bit 3
Bit 3
Bit 3
R/W
R/W
—
—
—
W
W
R
R
3
3
3
Bit 2
Bit 2
Bit 2
R/W
R/W
—
—
—
W
W
R
R
2
2
2
Bit 1
Bit 1
Bit 1
R/W
R/W
—
W
—
W
—
R
R
1
1
1
Bit 0
Bit 0
Bit 0
R/W
R/W
—
W
—
W
—
R
R
0
0
0
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