h8s-2169 Renesas Electronics Corporation., h8s-2169 Datasheet - Page 543

• Manufacturer Part Number: h8s-2169
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

IRTR flag setting is performed when the TDRE or RDRF flag is set to 1. IRTR is cleared by
reading IRTR after it has been set to 1, then writing 0 in IRTR. IRTR is also cleared automatically
when the IRIC flag is cleared to 0.
Bit 4—Second Slave Address Recognition Flag (AASX): In I
this flag is set to 1 if the first frame following a start condition matches bits SVAX6 to SVAX0 in
SARX.
AASX is cleared by reading AASX after it has been set to 1, then writing 0 in AASX. AASX is
also cleared automatically when a start condition is detected.
Bit 5
IRTR
0
1
Bit 4
AASX
0
1
Description
Waiting for transfer, or transfer in progress
[Clearing conditions]
1. When 0 is written in IRTR after reading IRTR = 1
2. When the IRIC flag is cleared to 0
Continuous transfer state
[Setting condition]
Description
Second slave address not recognized
[Clearing conditions]
1. When 0 is written in AASX after reading AASX = 1
2. When a start condition is detected
3. In master mode
Second slave address recognized
[Setting condition]
When the second slave address is detected in slave receive mode while FSX = 0
In I
When the TDRE or RDRF flag is set to 1 when AASX = 1
In other modes
When the TDRE or RDRF flag is set to 1
2
C bus interface slave mode
Rev. 3.00 Jan 18, 2006 page 515 of 1044
2
C bus format slave receive mode,
Section 16 I
REJ09B0280-0300
2
C Bus Interface
(Initial value)
(Initial value)